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» Dynamic Functional Unit Assignment for Low Power
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ASPDAC
2006
ACM
110views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Switching-activity driven gate sizing and Vth assignment for low power design
Power consumption has gained much saliency in circuit design recently. One design problem is modelled as ”Under a timing constraint, to minimize power as much as possible”. Pr...
Yu-Hui Huang, Po-Yuan Chen, TingTing Hwang
ISSS
1995
IEEE
117views Hardware» more  ISSS 1995»
13 years 9 months ago
Scheduling and resource binding for low power
Decisions taken at the earliest steps of the design process may have a significantimpact on the characteristics of the final implementation. This paper illustrates how power con...
Enric Musoll, Jordi Cortadella
ISLPED
1997
ACM
124views Hardware» more  ISLPED 1997»
13 years 9 months ago
Low power high level synthesis by increasing data correlation
With the increasing performance and density of VLSI circuits as well as the popularity of portable devices such as personal digital assistance, power consumption has emerged as an...
Dongwan Shin, Kiyoung Choi
CAV
2008
Springer
99views Hardware» more  CAV 2008»
13 years 7 months ago
Functional Verification of Power Gated Designs by Compositional Reasoning
Power gating is a technique for low power design in which whole sections of the chip are powered off when they are not needed, and powered back on when they are. Functional correct...
Cindy Eisner, Amir Nahir, Karen Yorav
VLSID
2008
IEEE
111views VLSI» more  VLSID 2008»
14 years 5 months ago
Power Reduction of Functional Units Considering Temperature and Process Variations
Continuous technology scaling has resulted in an increase in both, the power density as well as the variation in device dimensions (process variations) of the manufactured process...
Deepa Kannan, Aviral Shrivastava, Sarvesh Bhardwaj...