49 search results - page 2 / 10 » Dynamic Register Renaming Through Virtual-Physical Registers |
ARCS
2010
Springer
13 years 11 months ago
2010
Springer
Register renaming is a widely used technique to remove false data dependencies in superscalar datapaths. Rename logic consists of a table that holds a physical register mapping for...
ISCA
2005
IEEE
13 years 10 months ago
2005
IEEE
RENO is a modified MIPS R10000 register renamer that uses map-table “short-circuiting” to implement dynamic versions of several well-known static optimizations: move eliminat...
ISCA
2011
IEEE
12 years 8 months ago
2011
IEEE
Conventional high-performance processors utilize register renaming and complex broadcast-based scheduling logic to steer instructions into a small number of heavily-pipelined exec...
IEEEPACT
2003
IEEE
13 years 10 months ago
2003
IEEE
We present a technique for reducing the power dissipation in the course of writebacks and committments in a datapath that uses a dedicated architectural register file (ARF) to hol...
MICRO
2002
IEEE
13 years 9 months ago
2002
IEEE
The key issues for register file design in high-performance processors are access time and energy. While previous work has focused on reducing the number of registers, we propose...