39 search results - page 8 / 8 » Dynamic cache clustering for chip multiprocessors |
CODES
2009
IEEE
13 years 8 months ago
2009
IEEE
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
ISCA
2010
IEEE
13 years 6 months ago
2010
IEEE
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
ASPLOS
2012
ACM
12 years 15 days ago
2012
ACM
The rise of multi-core processors has shifted performance efforts towards parallel programs. However, single-threaded code, whether from legacy programs or ones difficult to para...
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...