Sciweavers

11 search results - page 1 / 3
» Dynamic noise analysis in precharge-evaluate circuits
Sort
View
DAC
2000
ACM
14 years 5 months ago
Dynamic noise analysis in precharge-evaluate circuits
A dynamic noise model is developed and applied to analyze the noise immunity of precharge-evaluate circuits. Considering that the primary source of noise-injection in the circuit ...
Dinesh Somasekhar, Seung Hoon Choi, Kaushik Roy, Y...
ICCAD
2005
IEEE
145views Hardware» more  ICCAD 2005»
14 years 1 months ago
Noise margin analysis for dynamic logic circuits
Suwen Yang, Mark R. Greenstreet
ISQED
2005
IEEE
162views Hardware» more  ISQED 2005»
13 years 10 months ago
Controlled-Load Limited Switch Dynamic Logic Circuit
Limited Switch Dynamic Logic (LSDL), a high performance logic circuit, has been modified by introducing a pseudo-nMOS style load. The resultant circuit consumes less power, primar...
Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Now...
ICCAD
2008
IEEE
172views Hardware» more  ICCAD 2008»
13 years 11 months ago
Frequency-aware PPV: a robust phase macromodel for accurate oscillator noise analysis
— Perturbation Projection Vector (PPV) is an established technique for oscillator phase noise analysis; However, the PPV method significantly loses accuracy when circuits have l...
Xiaolue Lai
ICCAD
1998
IEEE
94views Hardware» more  ICCAD 1998»
13 years 9 months ago
Noise considerations in circuit optimization
Noise can cause digital circuits to switch incorrectly and thus produce spurious results. Noise can also have adverse power, timing and reliability e ects. Dynamic logic is partic...
Andrew R. Conn, Ruud A. Haring, Chandramouli Viswe...