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» Dynamic synthesis for relaxed memory models
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PLDI
2012
ACM
11 years 7 months ago
Dynamic synthesis for relaxed memory models
Modern architectures implement relaxed memory models which may reorder memory operations or execute them non-atomically. Special instructions called memory fences are provided, al...
Feng Liu, Nayden Nedev, Nedyalko Prisadnikov, Mart...
DATE
2000
IEEE
140views Hardware» more  DATE 2000»
13 years 9 months ago
Resolution of Dynamic Memory Allocation and Pointers for the Behavioral Synthesis from C
-- One of the greatest challenges in C/C++-based design methodology is to efficiently map C/C++ models into hardware. Many of the networking and multimedia applications implemente...
Luc Séméria, Koichi Sato, Giovanni D...
ISCA
2007
IEEE
162views Hardware» more  ISCA 2007»
13 years 11 months ago
BulkSC: bulk enforcement of sequential consistency
While Sequential Consistency (SC) is the most intuitive memory consistency model and the one most programmers likely assume, current multiprocessors do not support it. Instead, th...
Luis Ceze, James Tuck, Pablo Montesinos, Josep Tor...
IPPS
1996
IEEE
13 years 9 months ago
Dag-Consistent Distributed Shared Memory
We introduce dag consistency, a relaxed consistency model for distributed shared memory which is suitable for multithreaded programming. We have implemented dag consistency in sof...
Robert D. Blumofe, Matteo Frigo, Christopher F. Jo...
ISCA
2006
IEEE
144views Hardware» more  ISCA 2006»
13 years 4 months ago
Conditional Memory Ordering
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
Christoph von Praun, Harold W. Cain, Jong-Deok Cho...