4 search results - page 1 / 1 » Dynamically Configurable Bus Topologies for High-Performance... |
TVLSI
2008
13 years 4 months ago
2008
The on-chip communication architecture is a major determinant of overall performance in complex System-on-Chip (SoC) designs. Since the communication requirements of SoC components...
VLSID
2006
IEEE
14 years 5 months ago
2006
IEEE
The two dominant architectural choices for implementing efficient communication fabrics for SoC's have been transaction-based buses and packet-based Networks-onChip (NoC). Bo...
DAC
2005
ACM
14 years 6 months ago
2005
ACM
In this paper, we describe FLEXBUS, a flexible, high-performance onchip communication architecture featuring a dynamically configurable topology. FLEXBUS is designed to detect run...
CODES
2003
IEEE
13 years 10 months ago
2003
IEEE
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...