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» ECO timing optimization using spare cells
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ICCAD
2007
IEEE
105views Hardware» more  ICCAD 2007»
14 years 1 months ago
ECO timing optimization using spare cells
(Chinese)
Yen-Pin Chen, Jia-Wei Fang, Yao-Wen Chang
DAC
2009
ACM
14 years 6 months ago
Matching-based minimum-cost spare cell selection for design changes
Metal-only ECO realizes the last-minute design changes by revising the photomasks of metal layers only. This task is challenging because the pre-injected spare cells are limited b...
Iris Hui-Ru Jiang, Hua-Yu Chang, Liang-Gi Chang, H...
DAC
2009
ACM
14 years 6 months ago
Spare-cell-aware multilevel analytical placement
Post-silicon validation has recently drawn designers' attention due to its increasing impacts on the VLSI design cycle and cost. One key feature of the post-silicon validatio...
Zhe-Wei Jiang, Meng-Kai Hsu, Yao-Wen Chang, Kai-Yu...
TCAD
2010
88views more  TCAD 2010»
12 years 11 months ago
Stress Aware Layout Optimization Leveraging Active Area Dependent Mobility Enhancement
Starting from the 90nm technology node, process induced stress has played a key role in the design of highperformance devices. The emergence of source/drain silicon germanium (S/D ...
Ashutosh Chakraborty, Sean X. Shi, David Z. Pan
MTDT
2003
IEEE
100views Hardware» more  MTDT 2003»
13 years 10 months ago
Optimal Spare Utilization in Repairable and Reliable Memory Cores
Advances in System-on-Chip (SoC) technology rely on manufacturing and assembling high-performance system cores for many critical applications. Among these cores, memory occupies t...
Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-...