61 search results - page 2 / 13 » Effectively sharing a cache among threads |
IEEEPACT
2005
IEEE
13 years 10 months ago
2005
IEEE
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
IEEEPACT
2006
IEEE
13 years 10 months ago
2006
IEEE
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
ISCA
1994
IEEE
13 years 8 months ago
1994
IEEE
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
ACISICIS
2005
IEEE
13 years 10 months ago
2005
IEEE
Simultaneous Multithreaded (SMT) processors improve the instruction throughput by allowing fetching and running instructions from several threads simultaneously at a single cycle....
ICPADS
2002
IEEE
13 years 9 months ago
2002
IEEE
This paper presents the study and results of running several core multimedia applications on a simultaneous multithreading (SMT) architecture, including some detailed analysis ran...