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» Efficient Hardware for Antialiasing Coverage Mask Generation
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CGI
2004
IEEE
13 years 8 months ago
Efficient Hardware for Antialiasing Coverage Mask Generation
An efficient low-cost, low-power hardware implementation of a novel run-time pixel coverage mask generation algorithm for embedded 3-D graphics antialiasing purposes is presented....
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
GRAPHICSINTERFACE
2004
13 years 6 months ago
Compressed Multisampling for Efficient Hardware Edge Antialiasing
Today's hardware graphics accelerators incorporate techniques to antialias edges and minimize geometry-related sampling artifacts. Two such techniques, brute force supersampl...
Philippe Beaudoin, Pierre Poulin
ATS
1998
IEEE
170views Hardware» more  ATS 1998»
13 years 9 months ago
A Ring Architecture Strategy for BIST Test Pattern Generation
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...
Christophe Fagot, Olivier Gascuel, Patrick Girard,...
ICCD
2002
IEEE
108views Hardware» more  ICCD 2002»
14 years 1 months ago
Low Power Mixed-Mode BIST Based on Mask Pattern Generation Using Dual LFSR Re-Seeding
Low power design techniques have been employed for more than two decades, however an emerging problem is satisfying the test power constraints for avoiding destructive test and im...
Paul M. Rosinger, Bashir M. Al-Hashimi, Nicola Nic...
ICCAD
2009
IEEE
151views Hardware» more  ICCAD 2009»
13 years 2 months ago
GREMA: Graph reduction based efficient mask assignment for double patterning technology
Double patterning technology (DPT) has emerged as the most hopeful candidate for the next technology node of the ITRS roadmap [1]. The goal of a DPT decomposer is to decompose the...
Yue Xu, Chris Chu