Sciweavers

75 search results - page 15 / 15
» Efficient Place and Route for Pipeline Reconfigurable Archit...
Sort
View
VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
14 years 5 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood
DAC
2005
ACM
13 years 7 months ago
Timing-driven placement by grid-warping
Grid-warping is a recent placement strategy based on a novel physical analogy: rather than move the gates to optimize their location, it elastically deforms a model of the 2-D chi...
Zhong Xiu, Rob A. Rutenbar
CIC
2004
13 years 6 months ago
Dynamic Characteristics of k-ary n-cube Networks for Real-time Communication
Overlay topologies are now popular with many emerging peer-to-peer (P2P) systems, to efficiently locate and retrieve information. In contrast, the focus of this work is to use ove...
Gerald Fry, Richard West
SIGARCH
2008
107views more  SIGARCH 2008»
13 years 5 months ago
Multitasking workload scheduling on flexible core chip multiprocessors
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
Divya Gulati, Changkyu Kim, Simha Sethumadhavan, S...
DAC
2008
ACM
13 years 7 months ago
Application mapping for chip multiprocessors
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...
Guangyu Chen, Feihui Li, Seung Woo Son, Mahmut T. ...