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» Efficient assertion based verification using TLM
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DAC
2008
ACM
14 years 6 months ago
Partial order reduction for scalable testing of systemC TLM designs
A SystemC simulation kernel consists of a deterministic implementation of the scheduler, whose specification is nondeterministic. To leverage testing of a SystemC TLM design, we f...
Sudipta Kundu, Malay K. Ganai, Rajesh Gupta
DATE
2010
IEEE
110views Hardware» more  DATE 2010»
13 years 10 months ago
Enabling efficient post-silicon debug by clustering of hardware-assertions
—Bug-free first silicon is not guaranteed by the existing pre-silicon verification techniques. To have impeccable products, it is now required to identify any bug as soon as the ...
Mohammad Hossein Neishaburi, Zeljko Zilic
FDL
2007
IEEE
13 years 9 months ago
Towards Assertion Based Verification of Analog and Mixed Signal Designs Using PSL
Abstract-- Analog and Mixed Signal (AMS) designs are important integrated systems that link digital circuits to the analog world. Following the success of PSL verification methodol...
Ghiath Al Sammane, Mohamed H. Zaki, Zhi Jie Dong, ...
APLAS
2007
ACM
13 years 9 months ago
Type-Based Verification of Correspondence Assertions for Communication Protocols
Gordon and Jeffrey developed a type system for checking correspondence assertions. The correspondence assertions, proposed by Woo and Lam, state that when a certain event (called a...
Daisuke Kikuchi, Naoki Kobayashi
ASAP
2005
IEEE
121views Hardware» more  ASAP 2005»
13 years 11 months ago
Using TLM for Exploring Bus-based SoC Communication Architectures
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
Sudeep Pasricha, Mohamed Ben-Romdhane