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MICRO
2010
IEEE
154views Hardware» more  MICRO 2010»
13 years 2 months ago
Elastic Refresh: Techniques to Mitigate Refresh Penalties in High Density Memory
High density memory is becoming more important as many execution streams are consolidated onto single chip many-core processors. DRAM is ubiquitous as a main memory technology, but...
Jeffrey Stuecheli, Dimitris Kaseridis, Hillery C. ...
HPCA
2009
IEEE
14 years 5 months ago
A novel architecture of the 3D stacked MRAM L2 cache for CMPs
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...
Guangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yira...