Elastic Refresh: Techniques to Mitigate Refresh Penalties in High Density Memory

High density memory is becoming more important as many execution streams are consolidated onto single chip many-core processors. DRAM is ubiquitous as a main memory technology, but while DRAM's per-chip density and frequency continue to scale, the time required to refresh its dynamic cells has grown at an alarming rate. This paper shows how currently-employed methods to schedule refresh operations are ineffective in mitigating the significant performance degradation caused by longer refresh times. Current approaches are deficient

• Type: Journal
• Year: 2010
• Where: MICRO
• Authors: Jeffrey Stuecheli, Dimitris Kaseridis, Hillery C. Hunter, Lizy K. John
• Keywords: DRAM, Hardware, Longer Refresh Times, MICRO 2010, Refresh Operations