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DAC
2003
ACM
14 years 6 months ago
Accurate timing analysis by modeling caches, speculation and their interaction
Schedulability analysis of real-time embedded systems requires worst case timing guarantees of embedded software performance. This involves not only language level program analysi...
Xianfeng Li, Tulika Mitra, Abhik Roychoudhury
ICCD
2004
IEEE
122views Hardware» more  ICCD 2004»
14 years 2 months ago
Linear Programming based Techniques for Synthesis of Network-on-Chip Architectures
Network-on-chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in the nanoscale regime. SoC design offers the opportunity fo...
Krishnan Srinivasan, Karam S. Chatha, Goran Konjev...
DAC
2005
ACM
14 years 6 months ago
Advanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions
While performance specifications are verified before sign-off for a modern nanometer scale design, extensive application of optical proximity correction substantially alters the l...
Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Denni...
DAC
2004
ACM
14 years 6 months ago
Abstraction of assembler programs for symbolic worst case execution time analysis
ion of Assembler Programs for Symbolic Worst Case Execution Time Analysis Tobias Schuele Tobias.Schuele@informatik.uni-kl.de Klaus Schneider Klaus.Schneider@informatik.uni-kl.de Re...
Klaus Schneider, Tobias Schüle
HPCA
2003
IEEE
14 years 6 months ago
Evaluating the Impact of Communication Architecture on the Performability of Cluster-Based Services
We consider the impact of different communication architectures on the performability (performance + availability) of cluster-based servers. In particular, we use a combination of ...
Kiran Nagaraja, Neeraj Krishnan, Ricardo Bianchini...