13 search results - page 2 / 3 » Embedded reconfigurable array targeting motion estimation ap... |
ASAP
2005
IEEE
13 years 10 months ago
2005
IEEE
In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
ASAP
2007
IEEE
13 years 6 months ago
2007
IEEE
FPGA (Field Programmable Gate Array) based reconfigurable processor has been shown to meet the increasingly challenging performance targets and shorter time-to-market pressures. I...
VLSID
2004
IEEE
14 years 5 months ago
2004
IEEE
demanding algorithm of a video encoder. It is known that about 60% ~ 80% of the total computation time is consumed for motion estimation [1]. The second is its high impact on the v...
SAMOS
2004
Springer
13 years 10 months ago
2004
Springer
Abstract. Loop unrolling plays an important role in compilation for Reconfigurable Processing Units (RPUs) as it exposes operator parallelism and enables other transformations (e.g...
IPPS
2006
IEEE
13 years 10 months ago
2006
IEEE
A design process is presented for the selection of a set of instruction set extensions for the PowerPC 405 processor that is embedded into the Xilinx Virtex Family of FPGAs. The i...