107 search results - page 21 / 22 » Energy Performance Design of Memory Hierarchies for Processo... |
CODES
2005
IEEE
13 years 11 months ago
2005
IEEE
To ensure low power consumption while maintaining flexibility and performance, future Systems-on-Chip (SoC) will combine several types of processor cores and data memory units of...
IEEEPACT
2006
IEEE
14 years 5 days ago
2006
IEEE
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
DATE
2009
IEEE
14 years 27 days ago
2009
IEEE
Abstract—To deal with the “memory wall” problem, microprocessors include large secondary on-chip caches. But as these caches enlarge, they originate a new latency gap between...
TVLSI
2008
13 years 6 months ago
2008
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
ISCA
2006
IEEE
14 years 4 days ago
2006
IEEE
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a ...