4 search results - page 1 / 1 » Energy-Efficiency of the MONTIUM Reconfigurable Tile Process... |
ERSA
2004
13 years 6 months ago
2004
FPL
2007
Springer
13 years 11 months ago
2007
Springer
This paper describes the mapping of a two-dimensional inverse discrete cosine transform (2-D IDCT) onto a wordlevel reconfigurable Montium R processor. This shows that the IDCT i...
ERSA
2006
13 years 6 months ago
2006
Abstract-- In heterogeneous tiled System-on-Chip architectures a Network-on-Chip is used to transport messages between processing elements. A reconfigurable network interface is us...
TVLSI
2008
13 years 4 months ago
2008
Mobile wireless terminals tend to become multimode wireless communication devices. Furthermore, these devices become adaptive. Heterogeneous reconfigurable hardware provides the fl...