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LCPC
2004
Springer
13 years 10 months ago
Power-Aware Scheduling for Parallel Security Processors with Analytical Models
Techniques to reduce power dissipation for embedded systems have recently come into sharp focus in the technology development. Among these techniques, dynamic voltage scaling (DVS)...
Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq ...
DATE
1998
IEEE
153views Hardware» more  DATE 1998»
13 years 9 months ago
An Energy-Conscious Exploration Methodology for Reconfigurable DSPs
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...
Jan M. Rabaey, Marlene Wan
CASES
2006
ACM
13 years 11 months ago
High-level power analysis for multi-core chips
Technology trends have led to the advent of multi-core chips in the form of both general-purpose chip multiprocessors (CMPs) and embedded multi-processor systems-on-a-chip (MPSoCs...
Noel Eisley, Vassos Soteriou, Li-Shiuan Peh
BMCBI
2010
185views more  BMCBI 2010»
12 years 12 months ago
MetaPIGA v2.0: maximum likelihood large phylogeny estimation using the metapopulation genetic algorithm and other stochastic heu
Background: The development, in the last decade, of stochastic heuristics implemented in robust application softwares has made large phylogeny inference a key step in most compara...
Raphaël Helaers, Michel C. Milinkovitch
CODES
2009
IEEE
13 years 8 months ago
TotalProf: a fast and accurate retargetable source code profiler
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
Lei Gao, Jia Huang, Jianjiang Ceng, Rainer Leupers...