416 search results - page 83 / 84 » Engineering Route Planning Algorithms |
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
Placement is one of the most important steps in the RTLto-GDSII synthesis process, as it directly defines the interconnects, which have become the bottleneck in circuit and syste...
SIGCOMM
2006
ACM
13 years 11 months ago
2006
ACM
Researchers have proposed a variety of metrics to measure important graph properties, for instance, in social, biological, and computer networks. Values for a particular graph met...
ICPP
2003
IEEE
13 years 10 months ago
2003
IEEE
A hardware-assisted design, dubbed cache-oriented multistage structure (COMS), is proposed for fast packet forwarding. COMS incorporates small on-chip cache memory in its constitu...
FPL
2006
Springer
13 years 9 months ago
2006
Springer
Given large circuit sizes, high clock frequencies, and possibly extreme operating environments, Field Programmable Gate Arrays (FPGAs) are capable of heating beyond their designed...
DAC
2011
ACM
12 years 5 months ago
2011
ACM
Clock tree synthesis is one of the most important and challenging problems in 3D ICs. The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with...