Sciweavers

43 search results - page 3 / 9
» Equivalence Checking of Reversible Circuits
Sort
View
DAC
2006
ACM
14 years 8 days ago
Mining global constraints for improving bounded sequential equivalence checking
In this paper, we propose a novel technique on mining relationships in a sequential circuit to discover global constraints. In contrast to the traditional learning methods, our mi...
Weixin Wu, Michael S. Hsiao
FMCAD
2004
Springer
13 years 11 months ago
Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders
This paper describes a new method that is useful in combinational equivalence checking with very challenging industrial designs. The method does not build a miter; instead it build...
In-Ho Moon, Carl Pixley
TVLSI
2008
107views more  TVLSI 2008»
13 years 6 months ago
Novel Probabilistic Combinational Equivalence Checking
Exact approaches to combinational equivalence checking, such as automatic test pattern generation-based, binary decision diagrams (BDD)-based, satisfiability-based, and hybrid appr...
Shih-Chieh Wu, Chun-Yao Wang, Yung-Chih Chen
ISQED
2008
IEEE
117views Hardware» more  ISQED 2008»
14 years 21 days ago
A Basis for Formal Robustness Checking
Correct input/output behavior of circuits in presence of internal malfunctions becomes more and more important. But reliable and efficient methods to measure this robustness are ...
Görschwin Fey, Rolf Drechsler
TCAD
2008
96views more  TCAD 2008»
13 years 6 months ago
An Implicit Approach to Minimizing Range-Equivalent Circuits
Abstract--Simplifying a combinational circuit while preserving its range has a variety of applications, such as combinational equivalence checking and random simulation. Previous a...
Yung-Chih Chen, Chun-Yao Wang