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DAC
1994
ACM
13 years 9 months ago
Statistical Estimation of the Switching Activity in Digital Circuits
Higher levels of integration have led to a generation of integrated circuits for which power dissipation and reliability are major design concerns. In CMOS circuits, both of these ...
Michael G. Xakellis, Farid N. Najm
ISCAS
2005
IEEE
129views Hardware» more  ISCAS 2005»
13 years 11 months ago
An analytical approach for soft error rate estimation in digital circuits
—Soft errors due to cosmic rays cause reliability problems during lifetime operation of digital systems, which increase exponentially with Moore’s law. The first step in develo...
Ghazanfar Asadi, Mehdi Baradaran Tahoori
TCAD
2010
164views more  TCAD 2010»
13 years 7 hour ago
Advanced Variance Reduction and Sampling Techniques for Efficient Statistical Timing Analysis
The Monte-Carlo (MC) technique is a traditional solution for a reliable statistical analysis, and in contrast to probabilistic methods, it can account for any complicate model. How...
Javid Jaffari, Mohab Anis
ICCAD
1994
IEEE
115views Hardware» more  ICCAD 1994»
13 years 9 months ago
Fast transient power and noise estimation for VLSI circuits
Abstract - Today's digital design systems are running out of steam, when it comes to meeting the challenges presented by simultaneous switching, power consumption and reliabil...
Wolfgang T. Eisenmann, Helmut E. Graeb
ASPDAC
2006
ACM
129views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Yield-area optimizations of digital circuits using non-dominated sorting genetic algorithm (YOGA)
With shrinking technology, the timing variation of a digital circuit is becoming the most important factor while designing a functionally reliable circuit. Gate sizing has emerged...
Vineet Agarwal, Janet Meiling Wang