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» Estimation of maximum power supply noise for deep sub-micron...
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ISLPED
1998
ACM
85views Hardware» more  ISLPED 1998»
13 years 9 months ago
Estimation of maximum power supply noise for deep sub-micron designs
Yi-Min Jiang, Kwang-Ting Cheng, An-Chang Deng
GLVLSI
2003
IEEE
146views VLSI» more  GLVLSI 2003»
13 years 10 months ago
A practical CAD technique for reducing power/ground noise in DSM circuits
One of the fundamental problems in Deep Sub Micron (DSM) circuits is Simultaneous Switching Noise (SSN), which causes voltage fluctuations in the circuit power/ground networks. In...
Arindam Mukherjee, Krishna Reddy Dusety, Rajsaktis...
VTS
2002
IEEE
128views Hardware» more  VTS 2002»
13 years 10 months ago
Power Supply Transient Signal Analysis Under Real Process and Test Hardware Models
A device testing method called Transient Signal Analysis (TSA) is subjected to elements of a real process and testing environment in this paper. Simulations experiments are design...
Abhishek Singh, Jim Plusquellic, Anne E. Gattiker
TVLSI
2008
207views more  TVLSI 2008»
13 years 5 months ago
Effective Radii of On-Chip Decoupling Capacitors
Decoupling capacitors are widely used to reduce power supply noise. On-chip decoupling capacitors have traditionally been allocated into the white space available on a die or place...
Mikhail Popovich, Michael Sotman, Avinoam Kolodny,...