22 search results - page 2 / 5 » Evaluating design tradeoffs in on-chip power management for ... |
LCTRTS
2010
Springer
13 years 3 months ago
2010
Springer
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...
GLVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power densi...
ISCA
2009
IEEE
14 years 1 days ago
2009
IEEE
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
HPDC
2012
IEEE
11 years 7 months ago
2012
IEEE
Consider a multithreaded parallel application running inside a multicore virtual machine context that is itself hosted on a multi-socket multicore physical machine. How should the...
IEEEPACT
2008
IEEE
13 years 11 months ago
2008
IEEE
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power...