8 search results - page 2 / 2 » Evaluation of a Low-Power Reconfigurable DSP Architecture |
VLSISP
2008
13 years 5 months ago
2008
Abstract-- This paper presents the architecture of an Asynchronous Array of simple Processors (AsAP), and evaluates its key architectural features as well as its performance and en...
DATE
2009
IEEE
13 years 12 months ago
2009
IEEE
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
DATE
1998
IEEE
13 years 9 months ago
1998
IEEE
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...