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» Examples of Models of the Asynchronous Circuits
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ICCAD
2003
IEEE
115views Hardware» more  ICCAD 2003»
14 years 2 months ago
Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
Curtis A. Nelson, Chris J. Myers, Tomohiro Yoneda
DAC
1996
ACM
13 years 9 months ago
A Technique for Synthesizing Distributed Burst-mode Circuits
We offer a technique to partition a centralized control-flow graph to obtain distributed control in the context of asynchronous highlevel synthesis. The technique targets Huffman-...
Prabhakar Kudva, Ganesh Gopalakrishnan, Hans M. Ja...
ENTCS
2010
113views more  ENTCS 2010»
13 years 5 months ago
Geometry of Synthesis II: From Games to Delay-Insensitive Circuits
This paper extends previous work on the compilation of higher-order imperative languages into digital circuits [4]. We introduce concurrency, an essential feature in the context o...
Dan R. Ghica, Alex Smith
CORR
2006
Springer
90views Education» more  CORR 2006»
13 years 5 months ago
Relatively inertial delays
The paper studies the relatively inertial delays that represent one of the most important concepts in the modeling of the asynchronous circuits.
Serban E. Vlad
TVLSI
2010
12 years 12 months ago
Asynchronous Data-Driven Circuit Synthesis
A method is described for synthesizing asynchronous circuits based on the Handshake Circuit paradigm but employing a data-driven, rather than a control-driven, style. This approach...
Sam Taylor, Doug A. Edwards, Luis A. Plana, Luis A...