774 search results - page 2 / 155 » Experiences of low power design implementation and verificat... |
ISCAS
2006
IEEE
13 years 11 months ago
2006
IEEE
Abstract— In this paper, we present an algorithm/architecturelevel design solution for implementing state-parallel adaptive Viterbi decoders that, compared with their Viterbi cou...
ICCD
2004
IEEE
14 years 2 months ago
2004
IEEE
In this paper, an efficient Montgomery multiplier is introduced for the modular exponentiation operation, which is fundamental to numerous public-key cryptosystems. Four aspects a...
CSSE
2008
IEEE
13 years 12 months ago
2008
IEEE
Multicore has shown its merits of high performance and low power consumption compared with traditional single cores. It also puts a challenge to the universities in how to teach a...
CAV
2008
Springer
13 years 7 months ago
2008
Springer
Power gating is a technique for low power design in which whole sections of the chip are powered off when they are not needed, and powered back on when they are. Functional correct...
IWSOC
2005
IEEE
13 years 11 months ago
2005
IEEE
This paper explores the design and optimization of Quasi-Floating Gate MOS techniques to lowvoltage/low-power digital circuitry. The simulated power consumption of standard CMOS g...