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» Explicit Communication and Synchronization in SARC
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ASPDAC
2010
ACM
233views Hardware» more  ASPDAC 2010»
13 years 3 months ago
Computer-aided recoding for multi-core systems
- The design of embedded computing systems faces a serious productivity gap due to the increasing complexity of their hardware and software components. One solution to address this...
Rainer Dömer
HPCA
2007
IEEE
14 years 5 months ago
Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications
Chip multiprocessors with multiple simpler cores are gaining popularity because they have the potential to drive future performance gains without exacerbating the problems of powe...
Hongtao Zhong, Steven A. Lieberman, Scott A. Mahlk...
ADHOC
2010
292views more  ADHOC 2010»
13 years 5 months ago
Sleep/wake scheduling for multi-hop sensor networks: Non-convexity and approximation algorithm
We investigate the problem of sleep/wake scheduling for low duty cycle sensor networks. Our work differs from prior work in that we explicitly consider the effect of synchronizati...
Yan Wu, Sonia Fahmy, Ness B. Shroff
ICC
2008
IEEE
120views Communications» more  ICC 2008»
13 years 11 months ago
Near-Optimum Soft-Output Ant-Colony-Optimization Based Multiuser Detection for the DS-CDMA Uplink
— In this contribution, a novel soft-output Ant Colony Optimization (ACO) based Multi-User Detector (MUD) is proposed for the synchronous Direct-Sequence Code-DivisionMultiple-Ac...
Chong Xu, Lie-Liang Yang, Robert G. Maunder, Lajos...
CODES
2009
IEEE
13 years 10 months ago
A tuneable software cache coherence protocol for heterogeneous MPSoCs
In a multiprocessor system-on-chip (MPSoC) private caches introduce the cache coherence problem. Here, we target at heterogeneous MPSoCs with a network-on-chip (NoC). Existing har...
Frank E. B. Ophelders, Marco Bekooij, Henk Corpora...