9 search results - page 2 / 2 » Exploiting Loop-Level Parallelism on Coarse-Grained Reconfig... |
VLSISP
2008
13 years 5 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
FCCM
2002
IEEE
13 years 10 months ago
2002
IEEE
Reconfigurable systems, and in particular, FPGA-based custom computing machines, offer a unique opportunity to define application-specific architectures. These architectures offer...
ERSA
2004
13 years 7 months ago
2004
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
IEEEPACT
2002
IEEE
13 years 10 months ago
2002
IEEE
This paper presents a new modulo scheduling algorithm for clustered microarchitectures. The main feature of the proposed scheme is that the assignment of instructions to clusters ...