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» Exploiting Value Locality in Physical Register Files
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MICRO
2003
IEEE
121views Hardware» more  MICRO 2003»
13 years 10 months ago
Exploiting Value Locality in Physical Register Files
The physical register file is an important component of a dynamically-scheduled processor. Increasing the amount of parallelism places increasing demands on the physical register...
Saisanthosh Balakrishnan, Gurindar S. Sohi
ACSC
2004
IEEE
13 years 9 months ago
Reducing Register Pressure Through LAER Algorithm
When modern processors keep increasing the instruction window size and the issue width to exploit more instruction-level parallelism (ILP), the demand of larger physical register ...
Gao Song
DATE
2009
IEEE
105views Hardware» more  DATE 2009»
14 years 20 hour ago
Exploiting narrow-width values for thermal-aware register file designs
—Localized heating-up creates thermal hotspots across the chip, with the integer register file ranked as the hottest unit in high-performance microprocessors. In this paper, we ...
Shuai Wang, Jie Hu, Sotirios G. Ziavras, Sung Woo ...
ICCD
2004
IEEE
101views Hardware» more  ICCD 2004»
14 years 2 months ago
Increasing Processor Performance Through Early Register Release
Modern superscalar microprocessors need sizable register files to support large number of in-flight instructions for exploiting ILP. An alternative to building large register file...
Oguz Ergin, Deniz Balkan, Dmitry V. Ponomarev, Kan...
ISLPED
2006
ACM
100views Hardware» more  ISLPED 2006»
13 years 11 months ago
Selective writeback: exploiting transient values for energy-efficiency and performance
Today’s superscalar microprocessors use large, heavily-ported physical register files (RFs) to increase the instruction throughput. The high complexity and power dissipation of ...
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev,...