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MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
13 years 11 months ago
Tradeoffs in designing accelerator architectures for visual computing
Visualization, interaction, and simulation (VIS) constitute a class of applications that is growing in importance. This class includes applications such as graphics rendering, vid...
Aqeel Mahesri, Daniel R. Johnson, Neal C. Crago, S...
CMS
2006
13 years 6 months ago
TAO: Protecting Against Hitlist Worms Using Transparent Address Obfuscation
Abstract. Sophisticated worms that use precomputed hitlists of vulnerable targets are especially hard to contain, since they are harder to detect, and spread at rates where even au...
Spyros Antonatos, Kostas G. Anagnostakis
EDBT
2010
ACM
133views Database» more  EDBT 2010»
13 years 11 months ago
FPGAs: a new point in the database design space
In line with the insight that “one size” of databases will not fit all application needs [19], the database community is currently exploring various alternatives to commodity...
René Müller, Jens Teubner
CSE
2009
IEEE
13 years 11 months ago
On the Design of a Suitable Hardware Platform for Protocol Stack Processing in LTE Terminals
—In this paper we present a design methodology for the identification and development of a suitable hardware platform (including dedicated hardware accelerators) for the data pl...
Sebastian Hessel, David Szczesny, Shadi Traboulsi,...
CASES
2006
ACM
13 years 10 months ago
Scalable subgraph mapping for acyclic computation accelerators
Computer architects are constantly faced with the need to improve performance and increase the efficiency of computation in their designs. To this end, it is increasingly common ...
Nathan Clark, Amir Hormati, Scott A. Mahlke, Sami ...