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ICCAD
2000
IEEE
148views Hardware» more  ICCAD 2000»
13 years 9 months ago
FIR Filter Synthesis Algorithms for Minimizing the Delay and the Number of Adders
—As the complexity of digital filters is dominated by the number of multiplications, many works have focused on minimizing the complexity of multiplier blocks that compute the co...
Hyeong-Ju Kang, Hansoo Kim, In-Cheol Park
ICC
2011
IEEE
242views Communications» more  ICC 2011»
12 years 4 months ago
A High-Performance 8-Tap FIR Filter Using Logarithmic Number System
—This paper presents an approach to implement a high-performance 8-tap digital FIR (Finite Impulse Response) filter using the Logarithmic Number System. In the past, FIR filter...
Yan Sun, Min Sik Kim
VLSI
2010
Springer
13 years 3 months ago
Design of low-complexity and high-speed digital Finite Impulse Response filters
—In this paper, we introduce a design methodology to implement low-complexity and high-speed digital Finite Impulse Response (FIR) filters. Since FIR filters suffer from a larg...
Diego Jaccottet, Eduardo Costa, Levent Aksoy, Paul...
ISSS
1997
IEEE
142views Hardware» more  ISSS 1997»
13 years 9 months ago
Optimization Method for Broadband Modem FIR Filter Design using Common Subexpression Elimination
- An approach for broadband modem FIR filter design optimization is presented. It addresses the minimization of the number of addersubtractors used in the hardware implementation o...
Robert Pasko, Patrick Schaumont, Veerle Derudder, ...
VLSID
1996
IEEE
130views VLSI» more  VLSID 1996»
13 years 9 months ago
A systolic architecture for LMS adaptive filtering with minimal adaptation delay
Existing systolic architectures for the LMS algorithm with delayed coeficient adaptation have large adaptation delay and hence degraded convergence behaviour. This paper presents ...
S. Ramanathan, V. Visvanathan