Sciweavers

15 search results - page 1 / 3
» FPGA Designs with Optimized Logarithmic Arithmetic
Sort
View
TC
2010
12 years 11 months ago
FPGA Designs with Optimized Logarithmic Arithmetic
Using a general polynomial approximation approach, we present an arithmetic library generator for the logarithmic number system (LNS). The generator produces optimized LNS arithmet...
Haohuan Fu, Oskar Mencer, Wayne Luk
FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
13 years 11 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk
DAC
2005
ACM
14 years 6 months ago
MiniBit: bit-width optimization via affine arithmetic
MiniBit, our automated approach for optimizing bit-widths of fixed-point designs is based on static analysis via affine arithmetic. We describe methods to minimize both the intege...
Dong-U Lee, Altaf Abdul Gaffar, Oskar Mencer, Wayn...
FPL
2009
Springer
156views Hardware» more  FPL 2009»
13 years 9 months ago
A highly scalable Restricted Boltzmann Machine FPGA implementation
Restricted Boltzmann Machines (RBMs) — the building block for newly popular Deep Belief Networks (DBNs) — are a promising new tool for machine learning practitioners. However,...
Sang Kyun Kim, Lawrence C. McAfee, Peter L. McMaho...
FCCM
1998
IEEE
113views VLSI» more  FCCM 1998»
13 years 9 months ago
PAM-Blox: High Performance FPGA Design for Adaptive Computing
PAM-Blox are object-oriented circuit generators on top of the PCI Pamette design environment, PamDC. High- performance FPGA design for adaptive computing is simplified by using a ...
Oskar Mencer, Martin Morf, Michael J. Flynn