14 search results - page 1 / 3 » FPGA Implementation of a Prototype WDM On-Line Scheduler |
FPL
2000
Springer
13 years 8 months ago
2000
Springer
Message sequencing and channel assignment are two important aspects to consider in optimizing the performance of Wavelength Division Multiplexing (WDM) networks. A scheduling techn...
CISIS
2011
IEEE
12 years 4 months ago
2011
IEEE
—Computational performance increasingly depends on parallelism, and many systems rely on heterogeneous resources such as GPUs and FPGAs to accelerate computationally intensive ap...
PPL
2008
13 years 4 months ago
2008
This paper presents the FPGA implementation of the prototype for the Data-Driven Chip-Multiprocessor (D2-CMP). In particular, we study the implementation of a Thread Synchronizati...
DATE
2008
IEEE
13 years 6 months ago
2008
IEEE
This paper presents the implementation of a dualpriority scheduling algorithm for real-time embedded systems on a shared memory multiprocessor on FPGA. The dual-priority microkern...
IPPS
2003
IEEE
13 years 9 months ago
2003
IEEE
ShareStreams (Scalable Hardware Architectures for Stream Schedulers) is a canonical architecture for realizing a range of scheduling disciplines. This paper discusses the design c...