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» FPGA Implementations of the ICEBERG Block Cipher
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ITCC
2005
IEEE
13 years 10 months ago
FPGA Implementations of the ICEBERG Block Cipher
— This paper presents FPGA (Field Programmable Gate Array) implementations of ICEBERG, a block cipher designed for reconfigurable hardware implementations and presented at FSE 2...
François-Xavier Standaert, Gilles Piret, Ga...
ISCAS
2008
IEEE
127views Hardware» more  ISCAS 2008»
13 years 11 months ago
Compact ASIC implementation of the ICEBERG block cipher with concurrent error detection
— ICEBERG is a block cipher that has been recently proposed for security applications requiring efficient FPGA implementations. In this paper, we investigate a compact ASIC imple...
Huiju Cheng, Howard M. Heys
FSE
2004
Springer
123views Cryptology» more  FSE 2004»
13 years 8 months ago
ICEBERG : An Involutional Cipher Efficient for Block Encryption in Reconfigurable Hardware
Abstract. We present a fast involutional block cipher optimized for reconfigurable hardware implementations. ICEBERG uses 64-bit text blocks and 128-bit keys. All components are in...
François-Xavier Standaert, Gilles Piret, Ga...
FPGA
2000
ACM
175views FPGA» more  FPGA 2000»
13 years 8 months ago
An FPGA implementation and performance evaluation of the Serpent block cipher
With the expiration of the Data Encryption Standard (DES) in 1998, the Advanced Encryption Standard (AES) development process is well underway. It is hoped that the result of the ...
Adam J. Elbirt, Christof Paar
CEE
2004
205views more  CEE 2004»
13 years 4 months ago
64-bit Block ciphers: hardware implementations and comparison analysis
A performance comparison for the 64-bit block cipher (Triple-DES, IDEA, CAST-128, MISTY1, and KHAZAD) FPGA hardware implementations is given in this paper. All these ciphers are u...
Paris Kitsos, Nicolas Sklavos, Michalis D. Galanis...