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LCPC
2004
Springer
13 years 10 months ago
Trimaran: An Infrastructure for Research in Instruction-Level Parallelism
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor a...
Lakshmi N. Chakrapani, John C. Gyllenhaal, Wen-mei...
FPGA
2008
ACM
133views FPGA» more  FPGA 2008»
13 years 6 months ago
Vector processing as a soft-core CPU accelerator
The currently accepted method of accelerating applications in FPGA soft processor systems is to design a custom hardware accelerator. This paper suggests the alternative approach ...
Jason Yu, Guy Lemieux, Christopher Eagleston
CODES
2007
IEEE
13 years 11 months ago
Combined approach to system level performance analysis of embedded systems
Compositional approaches to system-level performance analysis have shown great flexibility and scalability in the design of heterogeneous systems. These approaches often assume c...
Simon Künzli, Arne Hamann, Rolf Ernst, Lothar...
ICCAD
2001
IEEE
106views Hardware» more  ICCAD 2001»
14 years 2 months ago
System-Level Power/Performance Analysis of Portable Multimedia Systems Communicating over Wireless Channels
This paper presents a new methodology for system-level power and performance analysis of wireless multimedia systems. More precisely, we introduce an analytical approach based on ...
Radu Marculescu, Amit Nandi, Luciano Lavagno, Albe...
FPGA
1997
ACM
124views FPGA» more  FPGA 1997»
13 years 9 months ago
A FPGA-Based Implementation of a Fault-Tolerant Neural Architecture for Photon Identification
Event identification in photon counting ICCD detectors requires a high level image analysis which cannot be easily described algorithmically: neural networks are promising to appr...
Monica Alderighi, E. L. Gummati, Vincenzo Piuri, G...