15 search results - page 3 / 3 » FPGAs: Re-Inventing the Signal Processor |
FCCM
2008
IEEE
13 years 12 months ago
2008
IEEE
This paper presents a proto-type autonomous signal processing system on a chip. The system is architected such that high performance digital signal processing occurs in the FPGAâ€...
IJCNN
2008
IEEE
13 years 12 months ago
2008
IEEE
— In this work we show that a metaheuristic, the Variable Neighborhood Search (VNS), can be effectively used in order to improve the performance of the hardware–friendly versio...
ICCD
2007
IEEE
14 years 2 months ago
2007
IEEE
In single processor architectures, computationallyintensive functions are typically accelerated using hardware accelerators, which exploit the concurrency in the function code to ...
DAC
1997
ACM
13 years 9 months ago
1997
ACM
The paper presents an algorithm to determine the close-tosmallest possible data buffer sizes for arbitrary synchronous data flow (SDF) applications, such that we can guarantee the...
FPGA
2010
ACM
13 years 5 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...