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GLVLSI
2000
IEEE
116views VLSI» more  GLVLSI 2000»
13 years 10 months ago
Reducing bus transition activity by limited weight coding with codeword slimming
Transitions on high capacitance busses in VLSI systems result in considerable power dissipation. Various coding schemes have been proposed in literature to encode the input signal...
Vijay Sundararajan, Keshab K. Parhi
LCTRTS
2000
Springer
13 years 9 months ago
Reordering Memory Bus Transactions for Reduced Power Consumption
Low energy consumption is becoming the primary design consideration for battery-operated and portable embedded systems, such as personal digital assistants, digital still and movi...
Bruce R. Childers, Tarun Nakra
DAC
2005
ACM
13 years 8 months ago
Sign bit reduction encoding for low power applications
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
M. Saneei, Ali Afzali-Kusha, Zainalabedin Navabi
ICCAD
2007
IEEE
135views Hardware» more  ICCAD 2007»
14 years 2 months ago
A selective pattern-compression scheme for power and test-data reduction
— This paper proposes a selective pattern-compression scheme to minimize both test power and test data volume during scan-based testing. The proposed scheme will selectively supp...
Chia-Yi Lin, Hung-Ming Chen
DELTA
2006
IEEE
14 years 1 days ago
Minimizing Simultaneous Switching Noise (SSN) using Modified Odd/Even Bus Invert Method
In high speed digital circuits, the inductive effect is more dominant compared to capacitive effect. In particular, as the technology is shrinking, the spacing between interconnec...
K. S. Sainarayanan, J. V. R. Ravindra, M. B. Srini...