8 search results - page 1 / 2 » Fast Buffer Insertion for Yield Optimization Under Process V... |
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
With the emerging process variations in fabrication, the traditional corner-based timing optimization techniques become prohibitive. Buffer insertion is a very useful technique fo...
DAC
2007
ACM
14 years 6 months ago
2007
ACM
Process variation has become a critical problem in modern VLSI fabrication. In the presence of process variation, buffer insertion problem under performance constraints becomes mo...
ISPD
2006
ACM
13 years 11 months ago
2006
ACM
Advanced process technologies call for a proactive consideration of process variations in design to ensure high parametric timing yield. Despite of its popular use in almost any h...
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
- Advanced process technologies impose more significant challenges especially when manufactured circuits exhibit substantial process variations. Consideration of process variations...
ICCAD
2005
IEEE
14 years 1 months ago
2005
IEEE
— Process variations cause significant timing uncertainty and yield degradation in deep sub-micron technologies. A solution to counter timing uncertainty is post-silicon clock t...