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DATE
2002
IEEE
97views Hardware» more  DATE 2002»
13 years 9 months ago
Fast Method to Include Parasitic Coupling in Circuit Simulations
S-parameter based circuit simulators are used a lot for the design of microwave circuits. The accuracy of these simulators is limited by the fact that they do not take the electro...
B. L. A. Van Thielen, G. A. E. Vandenbosch
DATE
2005
IEEE
120views Hardware» more  DATE 2005»
13 years 6 months ago
Simulation Methodology for Analysis of Substrate Noise Impact on Analog / RF Circuits Including Interconnect Resistance
This paper reports a novel simulation methodology for analysis and prediction of substrate noise impact on analog / RF circuits taking into account the role of the parasitic resis...
Charlotte Soens, Geert Van der Plas, Piet Wambacq,...
DAC
2005
ACM
13 years 6 months ago
A green function-based parasitic extraction method for inhomogeneous substrate layers
This paper presents a new Green function-based approach for substrate parasitic extraction in substrates with inhomogeneous layers. This new formulation allows analysis of noise c...
Chenggang Xu, Ranjit Gharpurey, Terri S. Fiez, Kar...
GLVLSI
2009
IEEE
143views VLSI» more  GLVLSI 2009»
13 years 8 months ago
Unified P4 (power-performance-process-parasitic) fast optimization of a Nano-CMOS VCO
In this paper, we present the design of a P4 (Power-PerformanceProcess-Parasitic) aware voltage controlled oscillator (VCO) at nanoCMOS technologies. Through simulations, we have ...
Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos
ASPDAC
2005
ACM
101views Hardware» more  ASPDAC 2005»
13 years 6 months ago
A wideband hierarchical circuit reduction for massively coupled interconnects
— We develop a realizable circuit reduction to generate the interconnect macro-model for parasitic estimation in wideband applications. The inductance is represented by VPEC (vec...
Hao Yu, Lei He, Zhenyu Qi, Sheldon X.-D. Tan