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DAC
2008
ACM
14 years 7 months ago
Stochastic modeling of a thermally-managed multi-core system
Achieving high performance under a peak temperature limit is a first-order concern for VLSI designers. This paper presents a new model of a thermally-managed system, where a stoch...
Hwisung Jung, Peng Rong, Massoud Pedram
VLSID
2008
IEEE
150views VLSI» more  VLSID 2008»
14 years 6 months ago
PTSMT: A Tool for Cross-Level Power, Performance, and Thermal Exploration of SMT Processors
Simultaneous Multi-Threading (SMT) processors are becoming popular because they exploit both instruction-level and threadlevel parallelism by issuing instructions from different t...
Deepa Kannan, Aseem Gupta, Aviral Shrivastava, Nik...
ICCAD
2009
IEEE
171views Hardware» more  ICCAD 2009»
13 years 3 months ago
A hybrid local-global approach for multi-core thermal management
Multi-core processors have become an integral part of mainstream high performance computer systems. In parallel, exponentially increasing power density and packaging costs have ne...
Ramkumar Jayaseelan, Tulika Mitra
DAC
2009
ACM
14 years 26 days ago
On-line thermal aware dynamic voltage scaling for energy optimization with frequency/temperature dependency consideration
With new technologies, temperature has become a major issue to be considered at system level design. Without taking temperature aspects into consideration, no approach to energy o...
Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng
MICRO
2005
IEEE
113views Hardware» more  MICRO 2005»
13 years 11 months ago
Thermal Management of On-Chip Caches Through Power Density Minimization
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I....