Sciweavers

46 search results - page 1 / 10
» Fault Avoidance in Medium-Grain Reconfigurable Hardware Arch...
Sort
View
ERSA
2009
147views Hardware» more  ERSA 2009»
13 years 2 months ago
Fault Avoidance in Medium-Grain Reconfigurable Hardware Architectures
Medium-grain reconfigurable hardware (MGRH) architectures represent a hybrid between the versatility of a field programmable gate array (FPGA) and the computational power of a cust...
Kylan Robinson, José G. Delgado-Frias
TVLSI
2008
133views more  TVLSI 2008»
13 years 4 months ago
A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance
Reconfigurable hardware has become a well-accepted option for implementing digital signal processing (DSP). Traditional devices such as field-programmable gate arrays offer good fi...
Mitchell J. Myjak, José G. Delgado-Frias
FPL
2006
Springer
103views Hardware» more  FPL 2006»
13 years 8 months ago
An Efficient Fault Tolerance Scheme for Preventing Single Event Disruptions in Reconfigurable Architectures
Reconfigurable architectures are becoming increasingly popular with space related design engineers as they are inherently flexible to meet multiple requirements and offer signific...
Sajid Baloch, Tughrul Arslan, Adrian Stoica
AICCSA
2007
IEEE
89views Hardware» more  AICCSA 2007»
13 years 11 months ago
Software/Configware Implementation of Combinatorial Algorithms
This paper discusses an approach for solving combinatorial problems by combining software and dynamically reconfigurable hardware (configware). The suggested technique avoids inst...
Iouliia Skliarova, Valery Sklyarov
CHES
2008
Springer
146views Cryptology» more  CHES 2008»
13 years 6 months ago
Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration
Dynamically reconfigurable systems are known to have many advantages such as area and power reduction. The drawbacks of these systems are the reconfiguration delay and the overhead...
Nele Mentens, Benedikt Gierlichs, Ingrid Verbauwhe...