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DAC
2000
ACM
14 years 5 months ago
Self-test methodology for at-speed test of crosstalk in chip interconnects
The effect of crosstalk errors is most significant in highperformance circuits, mandating at-speed testing for crosstalk defects. This paper describes a self-test methodology that...
Xiaoliang Bai, Sujit Dey, Janusz Rajski
ICCAD
1999
IEEE
82views Hardware» more  ICCAD 1999»
13 years 9 months ago
Fault modeling and simulation for crosstalk in system-on-chip interconnects
Michael Cuviello, Sujit Dey, Xiaoliang Bai, Yi Zha...
DELTA
2008
IEEE
13 years 11 months ago
Compact Models for Signal Transient and Crosstalk Noise of Coupled RLC Interconnect Lines with Ramp Inputs
Analytical compact form models for the signal transient and crosstalk noise of two-coupled RLC lines are developed. Capacitive and inductive coupling effects are investigated and ...
Taehoon Kim, Dongchul Kim, Jung-A Lee, Yungseon Eo
DSD
2008
IEEE
124views Hardware» more  DSD 2008»
13 years 11 months ago
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level
This paper proposes a system-level cycle-based framework to model and design heterogeneous Multiprocessor Systems on-Chip (MPSoC), called GRAPES. The approach features flexibilit...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
ASPDAC
2006
ACM
122views Hardware» more  ASPDAC 2006»
13 years 10 months ago
IEEE standard 1500 compatible interconnect diagnosis for delay and crosstalk faults
– We propose an interconnect diagnosis scheme based on Oscillation Ring test methodology for SOC design with heterogeneous cores. The target fault models are delay faults and cro...
Katherine Shu-Min Li, Yao-Wen Chang, Chauchin Su, ...