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» Fault tolerant mechanism design
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DAC
2009
ACM
14 years 6 months ago
Computing bounds for fault tolerance using formal techniques
Continuously shrinking feature sizes result in an increasing susceptibility of circuits to transient faults, e.g. due to environmental radiation. Approaches to implement fault tol...
André Sülflow, Görschwin Fey, Rol...
CLUSTER
2002
IEEE
13 years 10 months ago
Design and Validation of Portable Communication Infrastructure for Fault-Tolerant Cluster Middleware
We describe the communication infrastructure (CI) for our fault-tolerant cluster middleware, which is optimized for two classes of communication: for the applications and for the ...
Ming Li, Wenchao Tao, Daniel Goldberg, Israel Hsu,...
EUROMICRO
2006
IEEE
13 years 11 months ago
Using WS-BPEL to Implement Software Fault Tolerance for Web Services
One area of the web services architecture yet to be standardised is that of fault tolerance for services. At the same time, WS-BPEL is moving from a de facto standard to an OASIS ...
Glen Dobson
ICPADS
2002
IEEE
13 years 10 months ago
Design and Analysis of a Fault-Tolerant Mechanism for a Server-Less Video-On-Demand System
Video-on-demand (VoD) systems have traditionally been built on the client-server architecture, where a video server stores, retrieves, and transmits video data to video clients fo...
Jack Y. B. Lee, Raymond W. T. Leung
DFT
2009
IEEE
189views VLSI» more  DFT 2009»
14 years 1 days ago
Analyzing Formal Verification and Testing Efforts of Different Fault Tolerance Mechanisms
Pre-fabrication design verification and post-fabrication chip testing are two important stages in the product realization process. These two stages consume a large part of resourc...
Meng Zhang, Anita Lungu, Daniel J. Sorin