75 search results - page 3 / 15 » Fault tolerant methods for reliability in FPGAs |
FPGA
2003
ACM
13 years 10 months ago
2003
ACM
This paper proposes a new high-level technique for designing fault tolerant systems in SRAM-based FPGAs, without modifications in the FPGA architecture. Traditionally, TMR has bee...
DAC
2010
ACM
13 years 9 months ago
2010
ACM
As device size shrinks to the nanometer range, FPGAs are increasingly prone to manufacturing defects. We anticipate that the ability to tolerate multiple defects will be very impo...
FPL
2006
Springer
13 years 9 months ago
2006
Springer
As manufacturing technology enters the ultra-deep submicron era, wafer yields are destined to drop due to higher occurrence of physical defects on the die. This paper proposes a y...
FPL
2004
Springer
13 years 10 months ago
2004
Springer
This paper presents a novel approach to interconnect fault location for FPGAs during power-on sequence. The method is based on a concept known as fault grading which utilizes defec...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
Most application level fault tolerance schemes in literature are non-adaptive in the sense that the fault tolerance schemes incorporated in applications are usually designed witho...