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» Floating Point Unit Generation and Evaluation for FPGAs
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FCCM
2003
IEEE
133views VLSI» more  FCCM 2003»
13 years 11 months ago
Floating Point Unit Generation and Evaluation for FPGAs
Most commercial and academic floating point libraries for FPGAs provide only a small fraction of all possible floating point units. In contrast, the floating point unit generat...
Jian Liang, Russell Tessier, Oskar Mencer
TVLSI
2008
121views more  TVLSI 2008»
13 years 6 months ago
Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores
Recently, it has become possible to implement floating-point cores on field-programmable gate arrays (FPGAs) to provide acceleration for the myriad applications that require high-p...
Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna
FPL
2006
Springer
140views Hardware» more  FPL 2006»
13 years 9 months ago
Architectural Modifications to Improve Floating-Point Unit Efficiency in FPGAs
FPGAs have reached densities that can implement floatingpoint applications, but floating-point operations still require a large amount of FPGA resources. One major component of IE...
Michael J. Beauchamp, Scott Hauck, Keith D. Underw...
WOTUG
2008
13 years 7 months ago
FPGA based Control of a Production Cell System
Most motion control systems for mechatronic systems are implemented on digital computers. In this paper we present an FPGA based solution implemented on a low cost Xilinx Spartan I...
Marcel A. Groothuis, Jasper J. P. van Zuijlen, Jan...
ERSA
2004
130views Hardware» more  ERSA 2004»
13 years 7 months ago
Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware
Abstract-- Technological advances have made FPGAs an attractive platform for the acceleration of complex scientific applications. These applications demand high performance and hig...
Ronald Scrofano, Viktor K. Prasanna