6 search results - page 1 / 2 » Formal Verification of Content Addressable Memories Using Sy... |
DAC
1997
ACM
13 years 9 months ago
1997
ACM
TACAS
1998
Springer
13 years 9 months ago
1998
Springer
This paper enables symbolic ternary simulation of systems with large embedded memories. Each memory array is replaced with a behavioral model, where the number of symbolic variable...
ASPDAC
2005
ACM
13 years 6 months ago
2005
ACM
- We address the problem of implication of assertion graphs that occur in generalized symbolic trajectory evaluation (GSTE). GSTE has demonstrated its powerful capacity in formal v...
VLSID
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper presents a detailed description of the application of a formal verification methodology to an ARM processor. The processor, a hybrid between the ARM7 and the StrongARM ...
CADE
2007
Springer
14 years 5 months ago
2007
Springer
Fault tolerance mechanisms are a key ingredient of dependable systems. In particular, software-implemented hardware fault tolerance (SIHFT) is gaining in popularity, because of its...