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» Function Smoothing with Applications to VLSI Layout
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ASPDAC
1999
ACM
65views Hardware» more  ASPDAC 1999»
13 years 9 months ago
Function Smoothing with Applications to VLSI Layout
Ross Baldick, Andrew B. Kahng, Andrew A. Kennings,...
TCAD
2002
110views more  TCAD 2002»
13 years 4 months ago
A constructive genetic algorithm for gate matrix layout problems
This paper describes an application of a Constructive Genetic Algorithm (CGA) to the Gate Matrix Layout Problem (GMLP). The GMLP happens in very large scale integration (VLSI) desi...
Alexandre César Muniz de Oliveira, Luiz Ant...
ALGORITHMICA
2004
111views more  ALGORITHMICA 2004»
13 years 4 months ago
The Hausdorff Voronoi Diagram of Point Clusters in the Plane
We study the Hausdorff Voronoi diagram of point clusters in the plane, a generalization of Voronoi diagrams based on the Hausdorff distance function. We derive a tight combinatori...
Evanthia Papadopoulou
GLVLSI
2000
IEEE
85views VLSI» more  GLVLSI 2000»
13 years 9 months ago
Fast and accurate estimation of floorplans in logic/high-level synthesis
In many applications such as high-level synthesis (HLS) and logic synthesis and possibly engineering change order (ECO) we would like to get fast and accurate estimations of diffe...
Kia Bazargan, Abhishek Ranjan, Majid Sarrafzadeh
EH
2004
IEEE
74views Hardware» more  EH 2004»
13 years 8 months ago
Sensory Channel Grouping and Structure from Uninterpreted Sensor Data
In this paper we focus on the problem of making a model of the sensory apparatus from raw uninterpreted sensory data as defined by Pierce and Kuipers (Artificial Intelligence 92:1...
Lars Olsson, Chrystopher L. Nehaniv, Daniel Polani