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DAC
2003
ACM
14 years 7 months ago
A scalable software-based self-test methodology for programmable processors
Software-based self-test (SBST) is an emerging approach to address the challenges of high-quality, at-speed test for complex programmable processors and systems-on chips (SoCs) th...
Li Chen, Srivaths Ravi, Anand Raghunathan, Sujit D...
DAC
2006
ACM
14 years 7 months ago
Timing-based delay test for screening small delay defects
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
VTS
2005
IEEE
151views Hardware» more  VTS 2005»
13 years 12 months ago
A CMOS RF RMS Detector for Built-in Testing of Wireless Transceivers
: This project involves the design of a CMOS RF RMS Detector that converts the RMS voltage amplitude of an RF signal to a DC voltage. Its high input impedance and small area make i...
Alberto Valdes-Garcia, Radhika Venkatasubramanian,...
EURODAC
1994
IEEE
145views VHDL» more  EURODAC 1994»
13 years 10 months ago
Testability analysis and improvement from VHDL behavioral specifications
This paper presents a testability improvement method for digital systems described in VHDL behavioral specification. The method is based on testability analysis at registertransfe...
Xinli Gu, Krzysztof Kuchcinski, Zebo Peng
ASC
2011
13 years 1 months ago
Autonomic fault-handling and refurbishment using throughput-driven assessment
A new paradigm for online EH regeneration using Genetic Algorithms (GAs) called Competitive Runtime Reconfiguration (CRR) is developed where performance is assessed based upon a b...
Ronald F. DeMara, Kening Zhang, Carthik A. Sharma