79 search results - page 1 / 16 » Functional Verification of Large ASICs |
DAC
1998
ACM
14 years 6 months ago
1998
ACM
DATE
2004
IEEE
13 years 9 months ago
2004
IEEE
ASIC designs for future communication applications cannot be simulated exhaustively. Formal Property Checking is a powerful technology to overcome the limitations of current funct...
TCAD
2002
13 years 5 months ago
2002
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
Structured-ASIC design provides a mid-way point between FPGA and cell-based ASIC design for performance, area and power, but suffers from the same increasing verification burden a...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
Choosing the right methodology is a significant step towards successful VLSI designs. Traditional methodologies and tools are no longer adequate to handle large and complex design...