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VLSISP
2008
103views more  VLSISP 2008»
13 years 3 months ago
Power Signature Watermarking of IP Cores for FPGAs
In this paper, we introduce a new method for watermarking of IP cores for FPGA architectures where the signature (watermark) is detected at the power supply pins of the FPGA. This ...
Daniel Ziener, Jürgen Teich
VLSID
2002
IEEE
207views VLSI» more  VLSID 2002»
14 years 5 months ago
Synthesis of High Performance Low Power Dynamic CMOS Circuits
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
Debasis Samanta, Nishant Sinha, Ajit Pal
ICCAD
1999
IEEE
148views Hardware» more  ICCAD 1999»
13 years 9 months ago
SAT based ATPG using fast justification and propagation in the implication graph
In this paper we present new methods for fast justification and propagation in the implication graph (IG) which is the core data structure of our SAT based implication engine. As ...
Paul Tafertshofer, Andreas Ganz
ISPD
2004
ACM
134views Hardware» more  ISPD 2004»
13 years 10 months ago
Performance-driven register insertion in placement
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
Dennis K. Y. Tong, Evangeline F. Y. Young